Referenced Items are not available for this document.
The author describes a structured, 13-week series of laboratory exercises which demonstrates very large scale integrated (VLSI) CMOS digital circuit design and simulation for undergraduates in electrical engineering. He also suggests cost effective measures that could make the laboratory exercises economically feasible for vocational schools, colleges, and universities
Published in:
Education, IEEE Transactions on
(Volume:34
,
Issue:
1
)
Date of Publication: Feb 1991
- Page(s):
- 47 - 51
- ISSN :
- 0018-9359
- INSPEC Accession Number:
- 3948717
- Digital Object Identifier :
- 10.1109/13.79880
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 06 August 2002
- Issue Date :
- Feb 1991
- Sponsored by :
- IEEE Education Society
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