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An undergraduate VLSI CMOS circuit design laboratory

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1 Author(s)
Williams, R.W. ; Dept. of Comput. Sci., Vermont Univ., Burlington, VT, USA

The author describes a structured, 13-week series of laboratory exercises which demonstrates very large scale integrated (VLSI) CMOS digital circuit design and simulation for undergraduates in electrical engineering. He also suggests cost effective measures that could make the laboratory exercises economically feasible for vocational schools, colleges, and universities

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Education, IEEE Transactions on  (Volume:34 ,  Issue: 1 )