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Capacity and cycle time-throughput understanding system (CAC-TUS) an analysis tool to determine the components of capacity and cycle time in a semiconductor manufacturing line

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1 Author(s)
Martin, D.P. ; Microelectron. Div., IBM Corp., Essex Junction, VT, USA

The investment required for a new semiconductor manufacturing line is currently in excess of Θ. Improving asset utilization by increasing equipment productivity has been a major focus in order to maximize the profit of a line in the face of this significant investment. A number of methodologies and analysis systems, both homegrown and commercial, have been developed to determine equipment productivity. Most of these analysis tools use data generated solely from this equipment (e.g., down states, up stares, number of wafers processed, etc.) to understand the components of equipment productivity. However, equipment suppliers have been very successful in providing equipment whose availability is usually greater than 85%. As a result, there are other capacity detractors that are as large or larger than those dealing with equipment availability. Examples are idle-no-WIP for cycle time, idle-no-operator due to wait for load/unload, and the effect of mix and volume on batch size. A common characteristic of these capacity detractors is that they occur when the equipment is available to run production. This paper describes an analysis tool, the capacity and cycle time-throughput understanding system (CAC-TUS), that has been developed and implemented to provide accurate and meaningful capacity loss components, especially when equipment is available to run production. This system combines equipment state data and lot logistical data to determine the magnitude of capacity and cycle time components, including idle-no-WIP and no operator. One of the advantages of this tool is that it greatly reduces the effort associated with operator coding. In addition, it can help determine elements of production such as train size, raw process time, etc. As a result, the magnitude of all capacity loss problems can be accurately measured, the correct owners can be assigned to resolve these problems, and efforts to improve capacity can be better focused

Published in:

Advanced Semiconductor Manufacturing Conference and Workshop, 1999 IEEE/SEMI

Date of Conference:

1999

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