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A robust 8F/sup 2/ ferroelectric RAM cell with depletion device (DeFeRAM)

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4 Author(s)
Braun, G. ; Siemens Corp. Technol., Munich, Germany ; Hoenigschmid, H. ; Schlager, T. ; Weber, W.

This paper describes an area penalty free, leakage compensated and noise immune 8F/sup 2/ cell design suitable for high density low power FeRAM generations. The array concept features a 1TIC ferroelectric memory cell containing an additional depletion device (DeFeRAM) controlled by the passing word line in a folded bit line architecture. A highly reliable three level word line driver circuit design is discussed.

Published in:

VLSI Circuits, 1999. Digest of Technical Papers. 1999 Symposium on

Date of Conference:

17-19 June 1999