By Topic

A 1 Gbps transceiver with receiver-end deskewing capability using non-uniform tracked oversampling and a 250-750 MHz four-phase DLL

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Yongsam Moon ; Seoul Nat. Univ., South Korea ; Deog-Kyoon Jeong

This paper describes a low power, 1 Gbps, CMOS link with measured bit error rate (BER)<10/sup -14/. To obtain the low BER, skew between clock and data is detected and removed by using non-uniform tracked over-sampling technique with a high-resolution phase control. A delay-locked loop (DLL) with a wide operating frequency range of 250-750 MHz generates four phase sampling clocks.

Published in:

VLSI Circuits, 1999. Digest of Technical Papers. 1999 Symposium on

Date of Conference:

17-19 June 1999