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Effect of back-gate bias on tunneling leakage in a gated P/sup +/-n diode

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1 Author(s)
Ming-Jer Chen ; Inst. of Electron., Nat. Chiao-Tung Univ., Hsin-Chu, Taiwan

The author describes observations of a thin-oxide gate-controlled p/sup +/-n diode in which tunneling leakage current characteristics were seen to have both dependent and independent components due to the substrate bias voltage. Previously proposed models for leakage current do not account for this observation. It is argued that this observation can be reasonably explained by the nature of the modulation of the surface space-charge region over the heavily doped p/sup +/ region as well as over the n-type substrate.<>

Published in:

IEEE Electron Device Letters  (Volume:12 ,  Issue: 5 )