By Topic

Context-switching techniques for decoupled multithreaded processors

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
J. Kreuzinger ; Dept. of Comput. Design & Fault Tolerance, Karlsruhe Univ., Germany ; T. Ungerer

Multithreading techniques use coarse grain parallelism to speed up computation of a multithreaded workload by better utilization of the resources of a single processor. The paper surveys context switching techniques for multithreaded single-issue processors and classifies the techniques due to the events that trigger a context switch. We survey static and dynamic block interleaving techniques and demonstrate the application of several techniques in the decoupled multithreaded Rhamma processor. We show that a speed-up of up to 2.1 can be reached with four threads over a single-threaded base processor

Published in:

EUROMICRO Conference, 1999. Proceedings. 25th  (Volume:1 )

Date of Conference: