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A time-domain model for power dissipation of CMOS buffers driving lossy transmission lines

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2 Author(s)
Cappuccino, G. ; Dept. of Electron. Comput. Sci. & Syst., Calabria Univ., Italy ; Cocorullo, G.

In this paper a simple time-domain line model for power dissipation calculation for CMOS buffers driving lossy transmission line is presented. The main benefits of the proposed model is its simplicity, maintaining the merit of a lumped-circuit model, that leads to great simulation efficiency. It requires in fact, a single resistor to calculate with sufficient accuracy both power dissipation aliquots in the CMOS-line-driver and in intra-chip lossy interconnects for modern VLSI integrated circuits

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EUROMICRO Conference, 1999. Proceedings. 25th  (Volume:1 )

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