By Topic

Bit error rate degradation due to a dip in the frequency response of an equalizing amplifier

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Yoneyama, M. ; Opt. Network Syst. Labs., NTT Electron. Corp., Kanagawa, Japan ; Akazawa, Yukio

This paper describes an analysis of bit error rate (BER) degradation due to a dip in the frequency response of an equalizing amplifier. An equivalent circuit simulation clarifies the BER degradation factors: (1) the output amplitude decrease of a specific binary sequence that has a repetition frequency equal to the dip frequency and (2) the oscillation in output voltage after rise and fall of signal level. A simple model shows that the center frequency and bandwidth of the dip as well as the depth of the dip strongly affect BER. A circuit simulation and experiment show that a dip at around one tenth the data rate causes the worst BER. The dip tolerance of a dc-suppressed transmission code is also discussed

Published in:

Lightwave Technology, Journal of  (Volume:17 ,  Issue: 10 )