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Design of low-power ROM-less direct digital frequency synthesizer using nonlinear digital-to-analog converter

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2 Author(s)
S. Mortezapour ; Dept. of Electr. & Comput. Eng., Iowa State Univ., Ames, IA, USA ; E. K. F. Lee

A design technique that uses nonlinear digital-to-analog converter (DAC) for implementing low-power direct digital frequency synthesizer (DDFS) is proposed. The nonlinear DAC is used in place of the ROM look up table for phase-to-sine amplitude conversion and the linear DAC in a conventional DDFS. Since the proposed design technique for DDFS does not require a ROM, significant saving in power dissipation results. The design procedure for implementing the nonlinear DAC is presented. To demonstrate the proposed technique, two quadrature DDFSs, one using nonlinear resistor string DACs and the other using nonlinear current-mode DACs, were implemented. For a 3.3-V supply, the resulting power dissipation for both DDFSs are 4 and 92 mW at a clock rate of 25 MHz and 230 MHz, respectively. For both DDFSs, the spurious free dynamic ranges are over 55 dB for low synthesized frequencies

Published in:

IEEE Journal of Solid-State Circuits  (Volume:34 ,  Issue: 10 )