Cart (Loading....) | Create Account
Close category search window

p-Type SiGe transistors with low gate leakage using SiN gate dielectric

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

9 Author(s)
Lu, W. ; Dept. of Electr. & Comput. Eng., Illinois Univ., Urbana, IL, USA ; Wang, X.W. ; Hammond, R. ; Kuliev, A.
more authors

Using high-quality jet-vapor-deposited (JVD) SiN as gate dielectric, p-type SiGe transistors are fabricated on SiGe heterostructures grown by ultra-high-vacuum chemical vapor deposition (UHVCVD). For an 0.25-/spl mu/m gate-length device, the gate leakage current is as small as 2.4 nA/mm at V/sub ds/=-1.0 V and V/sub gn/=0.4 V. A maximum extrinsic transconductance of 167 mS/mm is measured. A unity current gain cutoff frequency of 27 GHz and a maximum oscillation frequency of 35 GHz are obtained.

Published in:

Electron Device Letters, IEEE  (Volume:20 ,  Issue: 10 )

Date of Publication:

Oct. 1999

Need Help?

IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.