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An amplifier design approach is presented which is based on an all region MOS transistor model. Low power analogue circuits are designed using the presented approach. For illustrative purposes a nested transconductance-capacitance compensated (NGCC) operational amplifier is designed. Verification was carried out using a CMOS chip prototype which yields an op-amp with 105 dB gain, a 1.05 MHz gain-bandwidth product, 0.28 mW power consumption and 0.137 mm/sup 2/ active area for a 2 V supply voltage and 10 k/spl Omega//20pF load.