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Manufacturing process of double-poly CMOS IC for digital-analogue mixed signals

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4 Author(s)
Jianfeng Wang ; Inst. of Metall., Acad. Sinica, Shanghai, China ; Jian Cao ; Weiming Ga ; Yongming Shen

A double-poly CMOS processing for digital-analogue mixed signal ASIC is discussed in this paper, which is formed on the basis of standard CMOS processing and includes some special devices for digital-analogue mixed signal ASICs, such as polysilicon resistors and double polysilicon capacitors. These polysilicon resistors and polysilicon capacitors are fabricated by a processing compatible with standard CMOS processing and integrated on the CMOS ASIC during the CMOS ASIC manufacturing process. Two layers of LPCVD polysilicon are used in this process. The first layer of polysilicon is used to manufacture the gates for P-channel and N-channel MOS transistors and bottom electrodes of the polysilicon capacitors. After oxidation of the first layer of polysilicon, the second layer of polysilicon is deposited. Two different implantations are implemented on the second layer of polysilicon. One is a large dose of P+ implantation to form the upper electrode of the poly-silicon capacitor, another is a suitable dose of Si:BF2 + implantation to obtain the required resistance value of polysilicon resistors. The characteristics of the polysilicon resistors and double polysilicon capacitors are discussed in this paper, The relationship between the resistance value of polysilicon and the BF 2+ implantation dose is established

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Solid-State and Integrated Circuit Technology, 1998. Proceedings. 1998 5th International Conference on

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