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Improved programming performance of EEPROM/flash cell using post-poly-Si gate N/sub 2/O annealing

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6 Author(s)
Kuo-Ching Huang ; Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan ; Yean-Kuen Fang ; Dun-Nian Yaung ; Dison Kuo
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The effect of post poly-Si N/sub 2/O annealing on the programming performance and reliability of split-gate source-side-injection EEPROM/flash memory cells has been investigated. It is found that by employing post-poly-Si gate N/sub 2/O annealing, the programming efficiency and the immunity to program disturbances can be significantly improved.

Published in:

Electronics Letters  (Volume:35 ,  Issue: 13 )

Date of Publication:

24 June 1999

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