By Topic

Temperature-dependent bit-error rate of a clocked superconducting digital circuit

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Q. P. Herr ; Dept. of Electr. & Comput. Eng., Rochester Univ., NY, USA ; M. W. Johnson ; M. J. Feldman

We measured the bit-error rate (BER) of an RS latch, a clocked SFQ circuit. A digital error-detection circuit was used to detect BER in the range unity to 10/sup -13/; below 10/sup -7/, the circuit was operated with a 12 GHz on-chip clock. BER was measured as a function of control current; both positive and negative control current was applied, leading to two distinct modes of error incidence. The error function curves extrapolate to 10/sup -80/ for optimal control current at a temperature of 5.5 K. Measurements were repeated over the range 3-7 K. Comparison to theoretical error-function estimates of BER indicate that the noise is strictly thermal.

Published in:

IEEE Transactions on Applied Superconductivity  (Volume:9 ,  Issue: 2 )