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For broadband data communication between Josephson and CMOS digital systems, amplification of small Josephson-output signals and synchronization between the systems are important issues. We present an interface circuit for a Josephson-CMOS hybrid digital system. The interface circuit consists of a parallel-in-parallel-out (PIPO) circuit and built-in Josephson-MOS amplifiers. The PIPO circuit, implemented based on 4JL latching logic technology, performs synchronized data transfer between the Josephson and CMOS circuits. The Josephson-MOS amplifiers consists of stacked Josephson junctions (Suzuki stacks) and MOS inverters which are monolithically integrated on a chip. The circuits have been designed, fabricated and tested. We have successfully confirmed correct operation of the circuits.