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The objective of our research is to develop a machine-aligned technique for the definition and insulation of Nb/Al-AlO/sub x//Nb superconducting-insulating-superconducting (SIS) tunnel junctions with areas as small as 0.2 /spl mu/m/sup 2/. The fabrication of such ultrasmall area planar SIS junctions had previously only been achieved using electron beam lithography (JPL). Typical techniques for the fabrication of micron-scale SIS junctions involve a self-aligned resist lift-off process. The resist pattern is used to define both the junction counter-electrode and the insulation field that separates the wiring layer from the base electrode. The wiring layer contacts the junction counter-electrode through a via in the insulation field that is created during resist liftoff. In our process, the junction is defined and insulated in separate steps; a via through the insulation layer to the junction is aligned and defined using a gallium focused ion beam with nanometer spot-size. Such small area SIS junctions have potential applications in high frequency SIS mixer circuits. They may also be used in experiments to investigate quantum coherence in superconducting circuits and may even serve as the key elements in future superconducting quantum computers.