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PROPTEST: a property based test pattern generator for sequential circuits using test compaction

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3 Author(s)
Ruifeng Guo ; Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA ; S. M. Reddy ; I. Pomeranz

We describe a property based test generation procedure that uses static compaction to generate test sequences that achieve high fault coverages at a low computational complexity. A class of test compaction procedures are proposed and used in the property based test generator. Experimental results indicate that these compaction procedures can be used to implement the proposed test generator to achieve high fault coverage with relatively smaller run times

Published in:

Design Automation Conference, 1999. Proceedings. 36th

Date of Conference:

1999