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Dynamically reconfigurable architecture for image processor applications

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3 Author(s)
A. M. S. Adario ; Inst. for Inf., Fed. Univ., Porto Alegre, Brazil ; E. L. Roehe ; S. Bampi

This work presents an overview of the principles that underlie the speed-up achievable by dynamic hardware reconfiguration, proposes a more precise taxonomy for the execution models for reconfigurable platforms, and demonstrates the advantage of dynamic reconfiguration in the new implementation of a neighborhood image processor, called DRIP. It achieves a real-time performance, which is 3 times faster than its pipelined non-reconfigurable version

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Design Automation Conference, 1999. Proceedings. 36th

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