By Topic

A 200 MHz frequency-locked loop based on new frequency-to-voltage converters approach

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Djemouai, A. ; Dept. of Electr. & Comput. Eng., Ecole Polytech. de Montreal, Que., Canada ; Sawan, M. ; Slamani, M.

In this paper, we propose a high frequency, fully integrated frequency-locked loop (FLL) design based on a new architecture of a CMOS frequency-to-voltage converter. The design is similar to a phase-locked loop (PLL) in the way that it generates an output signal that tracks an input reference signal, however, in this case the two signals are synchronized in frequency and not in phase. The frequency of the FLL output could be also controlled by an input voltage, therefore, it could be also used as an integrated high-precision voltage-controlled oscillator. The proposed FLL is very fast, operates over a wide frequency range and occupies a small integrated area compared to an equivalent PLL

Published in:

Circuits and Systems, 1999. ISCAS '99. Proceedings of the 1999 IEEE International Symposium on  (Volume:2 )

Date of Conference:

Jul 1999