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Two specific design methods of frequency multipliers are presented. The first one is CAD oriented and based on the "Substitute Generator Technique" using nonlinear device models. The second one is based on a novel time-domain load-pull setup to measure and optimize voltage/current waveforms at both ports of frequency multipliers. These complementary design approaches allow to quickly and accurately determine all the optimum operating conditions for any frequency multiplier. The first design methodology is applied to the optimization of a broadband (34.5-39) GHz PHEMT MMIC tripler integrated into a transceiver manufactured at the UMS foundry. In the same way, the time-domain load-pull characterization is applied to the optimization of a S-band HBT doubler.