An analytical model to describe the bias dependent series resistances RS and RD of LDD MOSFETs down to quarter micron and below is introduced. Comparing measurement and simulation results of CMOS ring oscillators it has been found that for low voltage applications (Vdd=1 V) an incorrect description of RS and RD can cause a simulation error of up to 30% in the delay time of CMOS inverters
Published in:
Circuits and Systems, 1999. ISCAS '99. Proceedings of the 1999 IEEE International Symposium on
(Volume:6
)
Date of Conference: Jul 1999