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Browse Journals & Magazines > Semiconductor Manufacturing, ...> Volume:12 Issue:3 Help

An iterative cutting procedure for determining the optimal wafer exposure pattern

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3 Author(s)
Chen-Fu Chien ; Dept. of Ind. Eng. & Eng. Manage., Nat. Tsing Hua Univ., Hsinchu ; Shao-Chung Hsu ; Chih-Ping Chen

Conventionally, people focus on defect reduction to improve yield rate. Little research has been done to deal with the problem of optimizing wafer exposure patterns. This paper develops a computer-based procedure to maximize the number of dies possibly produced from a wafer. A program has been developed and implemented in a 6-in wafer fabrication factory in Taiwan. The results validate the practical viability of the proposed procedure

Published in:
Semiconductor Manufacturing, IEEE Transactions on  (Volume:12 ,  Issue: 3 )

Date of Publication: Aug 1999

Page(s):
375 - 377
ISSN :
0894-6507
INSPEC Accession Number:
6335418
Digital Object Identifier :
10.1109/66.778206
Product Type:
Journals & Magazines
Date of Current Version :
06 August 2002
Issue Date :
Aug 1999
Sponsored by :
IEEE Components, Packaging and Manufacturing Technology Society

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