Referenced Items are not available for this document.
As chip density is increased, number of I/Os are increased, and clock driver and fan out drivers constitute a large part of the chip. However, simultaneous switching of these drivers produces undesired noise and voltage changes on the chip ground and Vdd rails. In this paper these noises are modeled and simple expressions are derived that can estimate the shape and the peak of these pulses. These models are derived for both the long channel and short channel CMOS devices. HSPICE simulations confirm the validity of these models
Published in:
Circuits and Systems, 1999. ISCAS '99. Proceedings of the 1999 IEEE International Symposium on
(Volume:1
)
Date of Conference: Jul 1999
- Page(s):
- 533 - 536 vol.1
- Meeting Date :
- 30 May 1999-02 Jun 1999
- Print ISBN:
- 0-7803-5471-0
- INSPEC Accession Number:
- 6382235
- Conference Location :
- Orlando, FL
- Digital Object Identifier :
- 10.1109/ISCAS.1999.777946
- Product Type:
- Conference Publications
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