A new high-speed/low-power dynamic CMOS logic and its application to the design of an AOI-type ROM

A new high-speed and low-power dynamic CMOS logic named NHS-PDCMOS logic is proposed. An AOI-type ROM designed in NHS-PDCMOS logic is found to have enhanced speed and power performance than that designed in quasi-domino technique. The power and cycle-time product of the NHS-PDCMOS ROM is only 20.9% that of the quasi-domino ROM.