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A self-timed, fully-parallel content addressable queue for switching applications

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2 Author(s)
J. Podaima ; Dept. of Electr. & Comput. Eng., Toronto Univ., Ont., Canada ; G. Gulak

A self-timed, fully-parallel content addressable queue (CAQ) memory replaces traditional means of implementing pointer-based queuing in switching systems. A 16.5 Kb CAQ test device implemented in 0.8 μm CMOS, asynchronously performs four memory operations per clock cycle. Test results indicate a maximum operating frequency of 40 MHz

Published in:

Custom Integrated Circuits, 1999. Proceedings of the IEEE 1999

Date of Conference: