A general technique for derivation of average current mode control laws for single-phase power-factor-correction circuits without input voltage sensing

This paper presents a general technique to derive average current mode control (CMC) laws without input voltage sensing to achieve high power factor for single-phase topologies operating in continuous conduction mode (CCM). The control laws are derived based on the steady-state input-output voltage relationships and the CCM large-signal averaged pulsewidth modulation (PWM)-switch model. Using this methodology, average CMC laws with linear PWM waveforms are discovered for commonly used single-phase power stage topologies such as boost, flyback, SEPIC, and buck/boost. Conventional three-loop-controlled average CMC converters can now be controlled with a two-loop architecture. Hardware results for a boost power factor correction (PFC) and simulation results for flyback, SEPIC, and buck/boost topologies verify operation. The small-signal models of the current loop and voltage loop are derived for the boost topology and are used for control loop design. Input current harmonic distortion measurements demonstrate improved performance compared to the conventional three-loop control technique.