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Bypassing the CAMAC data bus to read out FERA data at higher rates

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5 Author(s)
Siegel, S. ; Nat. Inst. of Health, Bethesda, MD, USA ; Vaquero, J.J. ; Seidel, J. ; Gandler, W.R.
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The CAMAC standard offers flexibility by providing power and a data bus for various modules, but it is limited to a 1 Mword/sec bandwidth. LeCroy Research CAMAC modules with an auxiliary data bus, FERA, provide a 10 Mword/sec data transfer without CAMAC controller intervention. The authors have used a National Instruments digital I/O board (PCI-DIO-32 HS) as a FERA bus-to-host bridge. The board provides hardware handshaking, a 20 Mword/sec bandwidth, bus master scatter-gather DMA, and can control up to 2 FERA buses asynchronously. Multiple boards may reside on the same PCI or Compact PCI bus. A 300 MHz Pentium II running Windows NT 4.0 sustains >3.4 MB/sec throughput in 8255 emulation mode. These capabilities are being exploited in the authors' prototype small animal planar and PET imaging system where 32 ADC channels (16 bits each) and 3 scaler channels (32 bits each) define an event

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Nuclear Science Symposium, 1998. Conference Record. 1998 IEEE  (Volume:3 )

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