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Design and evaluation of a high-performance ATM firewall switch and its applications

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2 Author(s)
Jun Xu ; Dept. of Comput. & Inf. Sci., Ohio State Univ., Columbus, OH, USA ; Singhal, M.

We present the design of a value-added ATM switch that is capable of performing packet-level (IP) filtering at the maximum throughput of 2.88 Gbit/s per port. This firewall switch nicely integrates the IP level security mechanisms into the hardware components of an ATM switch so that most of the filtering operations are performed in parallel with the normal cell processing, and most of its cost is absorbed into the base cost of the switch. The firewall switch employs the concept of “last cell hostage” (LCH) to avoid or reduce the latency caused by filtering. We analyze in detail the performance of the firewall switch in terms of the throughput and the latency and address related design issues. Applications of our firewall switch as Internet and intranet security solutions are also discussed

Published in:

Selected Areas in Communications, IEEE Journal on  (Volume:17 ,  Issue: 6 )

Date of Publication:

Jun 1999

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