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Drivability improvement on deep-submicron MOSFETs by elevation of source/drain regions

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8 Author(s)
Yamakawa, S. ; Adv. Technol. R&D Center, Mitsubishi Electr. Corp., Itami, Japan ; Sugihara, K. ; Furukawa, T. ; Nishioka, Y.
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Deep submicron MOSFETs with elevated source/drain (S/D) structures, where S/D extension regions were partially elevated besides deep S/D regions, were fabricated by use of Si selective epitaxial growth technique. As fairly compared with a well-developed conventional MOSFET, we clarify an advantage of the elevated S/D structures, i.e., improvement upon driving performance with keeping excellent short-channel characteristics, which is enhanced for decrease in gate sidewall spacer width. The experimental results are explained in terms of the reduction in S/D parasitic resistance by addition of the Si epitaxial layer where the impurity profile is suitable.

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Electron Device Letters, IEEE  (Volume:20 ,  Issue: 7 )