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Low-leakage germanium-seeded laterally-crystallized single-grain 100-nm TFTs for vertical integration applications

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5 Author(s)
Subramanian, Vivek ; Dept. of Electr. Eng., Stanford Univ., CA, USA ; Toita, M. ; Ibrahim, N.R. ; Souri, S.J.
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We report on 100-nm channel-length thin-film transistors (TFTs) that are fabricated using germanium-seeded lateral crystallization of amorphous silicon. Germanium seeding allows the fabrication of devices with control over grain boundary location. Its effectiveness improves with reduced device geometry, allowing "single-grain" device fabrication. In the first application of this technology to deep submicron devices, we report on 100-nm devices having excellent performance compared to conventional TFTs, which have randomly located grains. Devices have on-off ratio >10/sup 6/ and subthreshold slope of 107 mV/decade, attesting to the suitability of germanium-seeding for the fabrication of high-performance TFTs, suitable for use in vertically integrated three-dimensional (3-D) circuits.

Published in:

Electron Device Letters, IEEE  (Volume:20 ,  Issue: 7 )

Date of Publication:

July 1999

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