Modeling interconnection networks using a hardware description language

Using a hardware descriptive language, it is possible to develop simulation models for processor interconnection networks which take hardware considerations into account during simulation. Models were produced for nine interconnection networks, specialized first for a simple algorithm, then adapted for a more complex task. Simulations were conducted to ensure the correctness of the models, and the complexities involved in expanding the simple example into the more complex one were considered. In particular, simulation results obtained with the DABL (Daisy Behavioral Language) model are presented. The DABL models were capable of providing more insight into hardware-related issues than simulations conducted in conventional programming languages.<
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