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A parallel algorithm to construct Voronoi diagram and its VLSI architecture

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3 Author(s)
Sudha, N. ; Dept. of Comput. Sci. & Eng., Indian Inst. of Technol., Panbazar, India ; Nandi, S. ; Sridharan, K.

This paper presents a parallel algorithm for computing the Voronoi diagram for collision-free path planning of robots. The algorithm constructs the Voronoi diagram on a binary image of the workspace and is based on the Euclidean distance function. It has been implemented in ANSI-C on an HP workstation. The algorithm is suitable for VLSI implementation in a cellular architecture. Such an architecture is described. Comparisons with an existing algorithm are also presented

Published in:
Robotics and Automation, 1999. Proceedings. 1999 IEEE International Conference on  (Volume:3 )

Date of Conference: 1999

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