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High-speed neural network based classifier for real-time application

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3 Author(s)
Yuk Ying Chung ; Space Centre for Satellite Navigation, Queensland Univ. of Technol., Brisbane, Qld., Australia ; Man To Wong ; Bergmann, N.W.

This paper describes how to implement a partially connected neural network by a Giga-Ops Spectrum G800 FPGA (field programmable gate arrays)-based custom computer which consists of up to 32 Xilinx XC4010 logic chips. From the training data, a decision tree is generated by the classifier program C4.5. The tree is then used to initialise the neural network to a nearly optimum configuration. This initialised partially connected neural network is then trained by training data. The trained neural network is then implemented by our custom computer system. This implementation requires fewer connections and can provide a very-high-speed classifier for many real-time image recognition applications

Published in:

Signal Processing Proceedings, 1998. ICSP '98. 1998 Fourth International Conference on

Date of Conference: