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An improved bipolar junction transistor (BJT) based silicon retina with simple and compact structure is proposed and analyzed. In the proposed structure, the BJT smoothing network, which models the layer of horizontal cells in the vertebrate retina, is implemented by placing enhancement n-channel MOSFETs among the bases of parasitic BJTs existing in a CMOS process to form an unique and compact structure. Thus, the smoothing characteristics can be tuned in a wide range. Moreover, an extra emitter is incorporated with each BJT at the pixel to act as the row switch. This reduces the cell area of the silicon retina and increases the resolution. Using the proposed new structure, an experimental 64/spl times/64 BJT-based silicon retina chip has been fabricated by using 0.5-/spl mu/m CMOS technology. The measurement results on the tunability of the smooth area in the smoothing network as well as the dynamic characteristics of the proposed silicon retina in detecting moving objects have been presented. It is believed that the improved structure is very suitable for the very large scale integration implementation of the retina and its application systems for CMOS smart sensors.
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on (Volume:7 , Issue: 2 )
Date of Publication: June 1999