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Weight-based codes and their application to concurrent error detection of multilevel circuits

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2 Author(s)
Das, D. ; Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA ; Touba, N.A.

This paper proposes a new class of codes termed “weight-based codes” where each output bit is assigned a weight and the check bits represent the stem of the weights of the output bits which have value “1”. A Berger code is a special member of this proposed class of codes where each output bit is assigned a weight of one. This paper describes the application of these codes for the efficient on-line error detection of arbitrary multilevel circuits. The overall probability of detecting any number of erroneous bits at the output caused by a single internal fault is shown to be higher for weight-based codes than standard error detecting codes. Further, a very efficient design exists for the checker. The checker is area and speed efficient, has low power consumption, and can be tested by a small set of incoming code words. There is always a tradeoff between the fault detection capability and area overhead requirement of an error detecting code. Weight-based codes present a controlled way of increasing the number of check bits to achieve a desired fault detection capability

Published in:
VLSI Test Symposium, 1999. Proceedings. 17th IEEE

Date of Conference: 1999

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