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The impact of rate mismatch in ATM switch design

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3 Author(s)
Fulton, C. ; NetQoS, Austin, TX, USA ; San-qi Li ; Lin, A.

This paper evaluates the buffer requirements resulting from rate mismatch in a 32×32 ATM switch with sixty OC-3 (155 Mbps) and four T-1 (1.5 Mbps) ports. Rate mismatch is expected to be a common occurrence in ATM wide area networks, particularly at the network seams. Without proper dimensioning, the switch buffers can rapidly overflow as a result of high-speed input traffic destined to a low-speed port. We specifically consider the Cisco Systems LightStream 1010 ATM switch architecture in our analysis, and compare the design options of a larger common shared buffer with that of adding buffers to each T-1 output port. We consider traffic from individual high-speed servers, LAN workstations, and aggregated Ethernet traffic

Published in:

Communications, 1999. ICC '99. 1999 IEEE International Conference on  (Volume:3 )

Date of Conference:

1999