By Topic

Performance enhancement of multistage interconnection networks with unit step buffering

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Hee Yong Youn ; Dept. of Comput. Sci. Eng., Texas Univ., Arlington, TX, USA ; Hyunseung Choo

Multistage interconnection networks (MINs) have been widely used for parallel computer systems, and also recognized as an efficient switching fabric for digital communication. In this paper, we propose a new switching mechanism for MINs called unit step buffering (USB) which significantly improves the network performance. Here each cell is allowed to move only one buffer entry position using short network cycle. The proposed USB scheme is compared to the traditional scheme by analytical modeling and computer simulation. They reveal that throughput and delay are improved about 60%-80% for practical size MINs with reasonable traffic in the asynchronous transfer mode (ATM) switching environment. Improvement on parallel computer systems with larger size packets is more significant at about 100%. More importantly, the scheme does not require any additional hardware or operational overhead

Published in:

Communications, IEEE Transactions on  (Volume:47 ,  Issue: 4 )