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High speed self-timed pipelined datapath for square rooting

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4 Author(s)
G. Cappuccino ; Dept. of Electron., Comput. Sci. & Syst., Calabria Univ., Italy ; G. Cocorullo ; P. Corsonello ; S. Perri

The authors describe a new high-performance self-timed circuit for asynchronous square rooting. The new architecture is based on a modified nonrestoring algorithm. An asynchronous pipelined cellular array without auxiliary system for the identification of exceptions is demonstrated. The self-timing approach allows the whole performance to be greatly improved with respect to synchronous implementation, causing acceptable area overheads

Published in:

IEE Proceedings - Circuits, Devices and Systems  (Volume:146 ,  Issue: 1 )