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A new technique for measuring the inductance of pin grid array packages

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3 Author(s)
Mosley, L.E. ; Intel Corp., Chandler, AZ, USA ; Mallik, D. ; Bhattacharyya, B.K.

A technique for measuring the inductance of pin-grid-array packages is described. It includes the design of a board that allows the measurements of inductance to values less than 10 pH. The board is unique in that it allows measurement of the inductance and resistance of 132-lead packages in less than an hour. The board was designed to allow testing of the package inductance with current sourced through multiple power pins and sunk through multiple ground pins. This measurement technique gives a true measure of the inductance with respect to the package ground loop, making possible the determination of the variation of the power and ground loop inductance from package to package. The authors discuss the design of the test board and how the board was modeled to remove the inductance, capacitance, and resistance of the board itself. The method is compared with the conventional technique for measuring inductance, and sample data for both methods are presented and compared. Results obtained by measuring the resonant frequency of the test boards show that the new method is more accurate than the old one

Published in:

Electronic Manufacturing Technology Symposium, 1989, Proceedings. Japan IEMT Symposium, Sixth IEEE/CHMT International

Date of Conference:

26-28 Apr 1989