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FSMD functional partitioning for low power

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3 Author(s)
E. Hwang ; Dept. of Comput. Sci. & Eng., California Univ., Riverside, CA, USA ; F. Vahid ; Yu-Chin Hsu

Previous work has shown that sizable power reductions can be achieved by shutting down a system's sub-circuits when they are not needed. However, these shutdown techniques focus on shutting down only portions of the controller or the datapath of a single custom hardware processor. We propose a higher level shutdown technique that considers both the controller and datapath simultaneously; in particular, we partition a processor into multiple simpler mutually-exclusive communicating processors, and then shut down the inactive processors (i.e., the inactive controller/datapath pairs). Power reduction is accomplished because only one smaller processor is active at a time. In addition to power reduction, functional partitioning also provides solutions to a variety of synthesis problems and does not require the modification of the synthesis tool. We present results showing that this FSMD functional partitioning technique can reduce power, on average, 42% over unoptimized systems.

Published in:

Design, Automation and Test in Europe Conference and Exhibition 1999. Proceedings

Date of Conference:

9-12 March 1999