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Design of a modulator ASIC for wide band CDMA wireless local loop system

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3 Author(s)
Lee, J.H. ; Div. of Mobile Telecommun. Technol., ETRI, Taejon, South Korea ; Bahg, Y.J. ; Cho, K.R.

In this paper, we present the design and implementation of modulator ASIC in direct sequence code division multiple access (DS-CDMA) wireless local loop (WLL) system. Here we just consider the issues of design and implementation of the channel in the forward link. We proposed a new base band filter structure reducing hardware size to one-half of conventional circuits. The modulator ASIC is composed of four channels which include channel coding, block interleaving, pseudonoise (PN) spreading, and four baseband filters. The ASIC is fabricated using 0.6 μm CMOS process with 40 k gates and is operated at 32 MHz. The implemented ASIC is successfully tested on WLL testbed system

Published in:

Circuits and Systems, 1998. Proceedings. 1998 Midwest Symposium on

Date of Conference:

9-12 Aug 1998