Design of a modulator ASIC for wide band CDMA wireless local loop system

In this paper, we present the design and implementation of modulator ASIC in direct sequence code division multiple access (DS-CDMA) wireless local loop (WLL) system. Here we just consider the issues of design and implementation of the channel in the forward link. We proposed a new base band filter structure reducing hardware size to one-half of conventional circuits. The modulator ASIC is composed of four channels which include channel coding, block interleaving, pseudonoise (PN) spreading, and four baseband filters. The ASIC is fabricated using 0.6 /spl mu/m CMOS process with 40 k gates and is operated at 32 MHz. The implemented ASIC is successfully tested on WLL testbed system.