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Design of multicast ATM switch

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2 Author(s)
R. C. Chang ; Dept. of Electr. Eng., Nat. Chung-Hsing Univ., Taichung ; C. -Y. Hsieh

The proposed ATM switch has very high throughput under heavy-traffic conditions. The cell blocking scenario described in the comment [see ibid., vol. 35, no 5, 1999] is of no importance. Directly after the switch is reset, the first four cells will not be placed in the same RAM with the help of the cell-in stage. Under heavy-traffic conditions, the number of cells in each RAM is well balanced and no blocking effect would occur for unicast traffic. That scenario would only arise at the end of transmission when no more cells would be entering the switch. However, the probability of that scenario ocurring is extremely low. Therefore, an internal memory speedup would not be needed and the throughput would not be degraded. The proposed dynamic multicast scheme can fully utilise the available bandwidth

Published in:

Electronics Letters  (Volume:35 ,  Issue: 5 )