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Designing a real-time coprocessor for Ada tasking

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1 Author(s)
Roos, J. ; R-Tech AB, Lund, Sweden

A VLSI coprocessor that radically improves the real-time performance of the Ada tasking model, especially the rendezvous, is discussed. An overview of multilevel design is given, and design levels and models are examined. A description is given of the design strategy, which entails stepwise refinement of functional models representing the coprocessor at more and more detailed levels. A chip was generated using the Genesil silicon compiler, but most of the design was defined and verified on the instruction-set-processor and register-transfer levels.<>

Published in:

Design & Test of Computers, IEEE  (Volume:8 ,  Issue: 1 )