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A novel critical path heuristic for fast fault grading

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3 Author(s)
Favalli, M. ; DEIS, Bologna Univ., Italy ; Olivo, P. ; Ricco, B.

A novel fault grading heuristic is presented, based on the critical path tracing technique that tackles the problems associated with fan-out reconverging nodes (FORNs) without using forward propagation of the fault effects. To determine the criticality status of a fan-out reconverging node, which can differ from that of its fan-out branches (FOBs), the concepts of evidencing and masking paths are used. Using the statistics from exact fault simulations, heuristic rules are derived for the generation of masking and evidencing paths. The results obtained on benchmark circuits show good accuracy for fault coverage estimates and a computation time linear in the number of gates and comparable to that of the fault-free simulation

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Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on  (Volume:10 ,  Issue: 4 )