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Effective synthesis algorithm for partitioned bus architecture

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2 Author(s)
Jinhwan Jeon ; Dept. of Electr. Eng., Seoul Nat. Univ., South Korea ; Kiyoung Choi

An effective synthesis algorithm is proposed for partitioned bus architecture when the number of buses is constrained. In the proposed algorithm, the probability of bus conflict is reduced, leading to a performance improvement. Experimental results show ~10-50% performance improvement over the conventional method

Published in:

Electronics Letters  (Volume:35 ,  Issue: 6 )