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VSPEC constraints modeling and evaluation

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2 Author(s)
Rajkhowa, A. ; Dept. of Electr. & Comput. Eng., Cincinnati Univ., OH, USA ; Alexander, P.

Performance constraints play a key role in VLSI design. Performance constraints evaluation help in discovering requirements specification errors at an early stage in the design process when they are easy to fix. VSPEC is a requirements specification language for digital systems that contains a standard method for describing constraints. The paper presents a method of evaluating and verifying these constraints. Performance Description Language (PDL) is used for evaluation. The system is implemented within the ORBIT design environment

Published in:

Engineering of Computer-Based Systems, 1999. Proceedings. ECBS '99. IEEE Conference and Workshop on

Date of Conference:

7-12 Mar 1999

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