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An 0.3-μm Si epitaxial base BiCMOS technology with 37-GHz fmax and 10-V BVceo for RF telecommunication

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10 Author(s)
Nii, H. ; Lab. of Microelectron. Eng., Toshiba Corp., Kawasaki, Japan ; Yoshino, C. ; Yoshitomi, S. ; Inoh, K.
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In this paper, a 0.3-μm BiCMOS technology for mixed analog/digital application is presented. A typical emitter area of this technology is 0.3 μm×1.0 μm. This technology includes high f max of 37 GHz at the low collector current of 300 μA and high BVceo of 10 V NPN transistor, CMOS with Leff=0.3 μm, and passive elements. By using the shallow and deep trench isolation technology and nonselective epitaxial intrinsic base, the Cjc can be reduced to 1.6 fF, which is the lowest value reported so far. As a results, we have managed to obtain the high fmax at the low current region and high BV ceo concurrently. These features will contribute to the development of high-performance BiCMOS LSI's for various mixed analog/digital applications

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Electron Devices, IEEE Transactions on  (Volume:46 ,  Issue: 4 )