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L-band on-chip matching Si-MMIC low noise amplifier fabricated in SOI CMOS process

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8 Author(s)
M. Ono ; Inf. Technol. R&D Centre, Mitsubishi Electr. Corp., Kanagawa, Japan ; N. Suematsu ; Y. Yamaguchi ; K. Ueda
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In this paper, on-chip matching Si-MMIC low noise amplifier (LNA) was fabricated in a 0.35 /spl mu/m SOI CMOS process. This LNA offers 8.7 dB gain, 4.2 dB NF, -2 dBm IIP3 at 2.1 GHz with 3 V, 3 mA DC power. The reduction of the dielectric loss of the spiral inductor is also discussed by referring to the extraction result of the equivalent circuit parameter.

Published in:

Silicon Monolithic Integrated Circuits in RF Systems, 1998. Digest of Papers. 1998 Topical Meeting on

Date of Conference:

18-18 Sept. 1998