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A high-frequency fully differential BiCMOS operational amplifier

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5 Author(s)
A. N. Karanicolas ; Dept. of Electr. Eng. & Comput. Sci., MIT, Cambridge, MA, USA ; K. K. O ; J. Y. A. Wang ; H. -S. Lee
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A high-frequency fully differential BiCMOS operational amplifier design for use in switched-capacitor circuits is presented. The operational amplifier is integrated in a 3.0-GHz, 2-μm BiCMOS process with an active die area of 1.0 mm×1.2 mm. This BiCMOS op amp offers an infinite input resistance, a DC gain of 100 dB, a unity-gain frequency of 90 MHz with 45° phase margin, and a slew rate of 150 V/μs. The differential output range is 12 V. The circuit is operated from a ±5-V power supply and dissipates 125 mW. The op amp is unity-gain stable with 7 pF of capacitive loading at each output. The op amp is a two-stage, pole-split frequency compensated design that uses a PMOS input stage for infinite input resistance and an n-p-n bipolar second stage for high gain and high bandwidth. The frequency compensation network serves both the differential- and common-mode amplifiers so the differential- and common-mode amplifier dynamics are similar. A dynamic switched-capacitor common-mode feedback scheme is used to set the output common-mode level of the first and second stages

Published in:

IEEE Journal of Solid-State Circuits  (Volume:26 ,  Issue: 3 )