By Topic

Novel high-speed flip-flop circuit with low power consumption using GaAs junction FETs

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $31
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Takano, C. ; Sony Corp. Res. Centre, Yokohama, Japan ; Wada, M. ; Kasahara, J.

A novel flip-flop circuit configuration is proposed for very high speed GaAs LSIs. A T-connected flip-flop circuit was fabricated using 0.5 mu m GaAs junction FETs. It operates at a maximum toggle frequency of 7.0 GHz with a power consumption of 10.8 mW.

Published in:

Electronics Letters  (Volume:27 ,  Issue: 9 )